platform.inc

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00001 #ifndef CYGONCE_HAL_PLATFORM_INC
00002 #define CYGONCE_HAL_PLATFORM_INC
00003 //=============================================================================
00004 //
00005 //  platform.inc
00006 //
00007 //  EDOSK-2764R "board" assembler header file
00008 //
00009 //=============================================================================
00010 //###ECOSGPLCOPYRIGHTBEGIN####
00011 // -------------------------------------------
00012 // This file is part of eCos, the Embedded Configurable Operating System.
00013 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
00014 //
00015 // eCos is free software; you can redistribute it and/or modify it under
00016 // the terms of the GNU General Public License as published by the Free
00017 // Software Foundation; either version 2 or (at your option) any later version.
00018 //
00019 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
00020 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
00021 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
00022 // for more details.
00023 //
00024 // You should have received a copy of the GNU General Public License along
00025 // with eCos; if not, write to the Free Software Foundation, Inc.,
00026 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
00027 //
00028 // As a special exception, if other files instantiate templates or use macros
00029 // or inline functions from this file, or you compile this file and link it
00030 // with other works to produce a work based on this file, this file does not
00031 // by itself cause the resulting work to be covered by the GNU General Public
00032 // License. However the source code for this file must still be made available
00033 // in accordance with section (3) of the GNU General Public License.
00034 //
00035 // This exception does not invalidate any other reasons why a work based on
00036 // this file might be covered by the GNU General Public License.
00037 //
00038 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
00039 // at http://sources.redhat.com/ecos/ecos-license/
00040 // -------------------------------------------
00041 //###ECOSGPLCOPYRIGHTEND####
00042 //=============================================================================
00043 //#####DESCRIPTIONBEGIN####
00044 //
00045 // Author(s):    yoshinori sato
00046 // Contributors: yoshinori sato, Uwe Kindler
00047 // Date:         2003-12-06
00048 // Purpose:      EDOSK-2674R "board" definitions.
00049 // Description:  This file contains various definitions and macros that are
00050 //               required for writing assembly code for the am31 simulator.
00051 //               Currently there are none
00052 // Usage:
00053 //       #include <cyg/hal/platform.inc>
00054 //       ...
00055 //      
00056 //
00057 //####DESCRIPTIONEND####
00058 //
00059 //=============================================================================
00060 
00061 
00062 //=============================================================================
00063 //                                   INCLUDES
00064 //=============================================================================
00065 #include <pkgconf/hal.h>
00066 
00067 #include <cyg/hal/mod_regs_bsc.h>
00068 #include <cyg/hal/mod_regs_pio.h>
00069 #include <cyg/hal/mod_regs_intc.h>
00070 #include <cyg/hal/mod_regs_sys.h>
00071 
00072 
00073 //============================================================================
00074 //                      INITIALIZE INTERRUPT CONTROLLER
00075 // DESCRIPTION:
00076 //     Sets up the interrupt control mode selected by user.
00077 //============================================================================
00078 #define CYGPKG_HAL_H8S_INTC_DEFINED
00079     .macro  hal_intc_init
00080     #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)  
00081         //
00082         // setup interrupt control mode and NMI edge
00083         //
00084         mov.b   #(CYGARC_INTCR_ICM2 | CYGARC_INTCR_NMIEG_RIS), r0l
00085         mov.b   r0l,@CYGARC_INTCR
00086         //
00087         // setup interrupt registers for external interrupts
00088         //
00089         mov.w #0x0555, r0         // interrupt on falling edge for IRQ5-IRQ0
00090         mov.w r0, @CYGARC_ISCRL
00091         mov.w #0xff3f, r0         // select pins (IRQ15-IRQ8 port2, IRQ7,6 port 57, 56, IRQ5-IRQ0 port 8)
00092         mov.w r0, @CYGARC_ITSR
00093         mov.w #0x0000, r0         // IRQn requests are not sampled in software standby state
00094         mov.w r0, @CYGARC_SSIER
00095     #endif // #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)          
00096     .endm
00097 
00098 
00099 //=============================================================================
00100 //                   INITIALIZE MEMORY AND BUS CONTROLLER
00101 // DESCRIPTION:
00102 //     Initializes memory and bus controller of EDOSK board.
00103 //=============================================================================
00104 #define CYGPKG_HAL_H8S_MEMC_DEFINED
00105     .macro  hal_memc_init
00106     #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM) 
00107     //
00108     // we have to initialize memory, port i/o and bus controller only if we
00109     // are doing ROM startup. If we are doing RAM startup then this should
00110     // be already done by ROM monitor
00111     //
00112       
00113     //
00114     // BSC/GPIO setup
00115     //
00116     mov.l   #init_regs,er0
00117     mov.w   #0xff,e2
00118     //
00119     // now initialize all registesr in init_regs
00120     //
00121 regs_init_loop:
00122     mov.w   @er0+,r2
00123     beq     regs_init_finished
00124     mov.w   @er0+,r1
00125     mov.b   r1l,@er2
00126     bra     regs_init_loop
00127 
00128     #define INIT_REGS_DATA(REGS,DATA) .word ((REGS) & 0xffff),DATA
00129 
00130 //
00131 // All registers to be initialized and their initial values
00132 //
00133 init_regs:
00134 INIT_REGS_DATA(CYGARC_ASTCR,  0xff)
00135 INIT_REGS_DATA(CYGARC_RDNCR,  0x00)
00136 INIT_REGS_DATA(CYGARC_ABWCR,  0x80)
00137 INIT_REGS_DATA(CYGARC_WTCRAH, 0x27)
00138 INIT_REGS_DATA(CYGARC_WTCRAL, 0x77)
00139 INIT_REGS_DATA(CYGARC_WTCRBH, 0x71)
00140 INIT_REGS_DATA(CYGARC_WTCRBL, 0x22)
00141 INIT_REGS_DATA(CYGARC_CSACRH, 0x80)
00142 INIT_REGS_DATA(CYGARC_CSACRL, 0x80)
00143 INIT_REGS_DATA(CYGARC_BROMCRH,0xa0)
00144 INIT_REGS_DATA(CYGARC_BROMCRL,0xa0)
00145 INIT_REGS_DATA(CYGARC_P3DDR,  0x3a)
00146 INIT_REGS_DATA(CYGARC_P3ODR,  0x06)
00147 INIT_REGS_DATA(CYGARC_PADDR,  0xff)
00148 INIT_REGS_DATA(CYGARC_PFDDR,  0xfe)
00149 INIT_REGS_DATA(CYGARC_PGDDR,  0x0f)
00150 INIT_REGS_DATA(CYGARC_PHDDR,  0x0f)
00151 INIT_REGS_DATA(CYGARC_PFCR0,  0xff)
00152 INIT_REGS_DATA(CYGARC_PFCR2,  0x0d)
00153 INIT_REGS_DATA(CYGARC_ITSR,   0x00)
00154 INIT_REGS_DATA(CYGARC_ITSR+1, 0x3f)
00155 INIT_REGS_DATA(CYGARC_MSTPCRL,0xf7)
00156     .word   0
00157 
00158 regs_init_finished:
00159     //
00160     // initialize SDRAM_MEMORY - special thanks to Arizona Cooperative Power
00161     //
00162     #define SDRAM_SMR 0x400040
00163     mov.b   #0, r0l
00164     mov.b   r0l, @CYGARC_DRACCR
00165     mov.w   #0x188, r0
00166     mov.w   r0, @CYGARC_REFCR
00167     mov.w   #0x85b4, r0
00168     mov.w   r0, @CYGARC_DRAMCR
00169     mov.b   #0, r1l
00170     mov.b   r1l,@SDRAM_SMR
00171     mov.w   #0x84b4, r0
00172     mov.w   r0, @CYGARC_DRAMCR
00173      
00174     #endif // #if defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
00175     .endm
00176 
00177 
00178 //=------------------------------------------------------------------------------
00179 #endif // ifndef CYGONCE_HAL_PLATFORM_INC
00180 // end of platform.inc

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